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| Visitors Out: 128 |
| Total Visitors Out: 128 |
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| Increase microcontroller code efficiency |
| 2008-03-09 07:36:53 |
C compilers are getting more and more advanced, but there is always a trade off made between speed and code size. Compiled code can be faster or smaller but not both. So you have to choose which part is more important speed or code size.The Increase of microcontroller code efficiency can be done in many […]...
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| Minimizing microcontroller code size |
| 2008-03-09 07:36:29 |
Reducing microcontroller code size isn’t ease task, but what if you want resulting code to fit your available memory…Minimizing microcontroller code size can be done in two ways:Firs is using compilers optimization feature by code size. This optimization is very dangerous. Your optimized code may not work as supposed to because compiler may eliminate some […]...
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| Microcontroller eats too much of RAM |
| 2008-03-09 07:36:03 |
All you know that microcontrollers have limited amount RAM and EEPROM. For instance ATMega128 has 4-Kbytes of RAM, 4-Kbyte of EEPROM. This may seem quite enough for some applications, but more complicated routines require more of RAM. And there is no compiler that can do better optimization on usage of ram than programmer.The main aim […]...
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| Building embedded software using algorithm flow charts |
| 2008-03-09 07:35:36 |
Embedded software consists of various functions performing particular tasks. Before writing any ASM or C code it is good to draw algorithm flow chart. Flow charts are visual method of representing inner algorithm. It is easer analyze the algorithm and write the code according to diagram.The main parts of diagram: Fig 1. Simple series instructions Fig 2. […] ...
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| ARM Development Tools |
| 2008-03-09 07:35:13 |
http://www.arm.com/ Professional information about ARM microcontrollers;http://www.codesourcery.com/gnu_toolchains/arm.html develops improvements to the GNU Tool-chain for ARM processors and provides regular, carefully tested, pre-compiled releases of the GNU Tool-chain;http://www.EmbeddedArtists.com/ Ships pre-setup GCC build environment with all their Quick-Start Boards/Kits;http://www.embedinfo.com/ Embest IDE for ARM, include Compiler,debugger,editor,project manager,flash programmer,JTAG Emulator, Low cost;http://www.iar.com/ Embedded Workbench for ARM7,9,11 C/C++ compiler;http://www.keil.com/ IDE,Debugger,Simulator which […]...
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| Programming microcontrollers AduC70xx using boot-loader and ARMWSD utility |
| 2008-03-09 07:34:43 |
Firmware for AduC70xx ARM microcontrollers can be uploaded using built in boot-loader. To work with boot-loader Analog Devices offer to use small free program ARMWSD working under windows system. Program doesn’t require installation. ARMWSD communicates with AduC70xx via COM-port. Simple programming steps looks like this: Connect target board to PC COM port; Go to Configure->Parts and select […] ...
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| New ARM7 Microcontrollers from NXP with LCD support |
| 2008-03-09 07:34:18 |
New microcontroller LPC2478 from NXP company is based on ARM7 core with built in Flash memory and have built in LCD interface. LPC2470 has no Flash memory.LPC24 series have two high speed buses AHB to ensure independent work of peripherals like LCD, 10/100 Ethernet, USB and two channels of CAN. LPC24xx have reasonable low prices […]...
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| 32 bit microcontrollers from ATMEL with ARM7 core |
| 2008-03-09 07:33:48 |
Somehow I’ve been sticked to NXP LPC2xxx series microcontrollers and left other brands behind. There are many major manufacturers of ARM microcontrollers. One of them that is worth to pay attention is Atmel with its AT91SAM7 (Smart ARM7) series. SAM7 series of microcontrollers have built in Flash memory and data memory as well. Core is […]...
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| Microprocessor programming |
| 2008-01-10 01:30:08 |
The "vocabulary" of instructions which any particular microprocessor chip possesses is specific to that model of chip. An Intel 80386, for example, uses a completely different set of binary codes than a Motorola 68020, for designating equivalent functions. Unfortunately, there are no standards in place for microprocessor instructions. This makes programming at the very lowest level very confusing and specialized. When a human programmer develops a set of instructions to directly tell a microprocessor how to do something (like automatically control the fuel injection rate to an engine), they're programming in the CPU's own "language." This language, which consists of the very same binary codes which the Control Unit inside the CPU chip decodes to...
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| Microprocessors |
| 2008-01-10 01:29:34 |
Early computer science pioneers such as Alan Turing and John Von Neumann postulated that for a computing device to be really useful, it not only had to be able to generate specific outputs as dictated by programmed instructions, but it also had to be able to write data to memory, and be able to act on that data later. Both the program steps and the processed data were to reside in a common memory "pool," thus giving way to the label of the stored-program computer. Turing's theoretical machine utilized a sequential-access tape, which would store data for a control circuit to read, the control circuit re-writing data to the tape and/or moving the tape to a new position to read more data. Modern computers use random-access memory devices instead of sequential-access tapes to accomplish essen...
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| Finite-state machines |
| 2008-01-10 01:29:05 |
Feedback is a fascinating engineering principle. It can turn a rather simple device or process into something substantially more complex. We've seen the effects of feedback intentionally integrated into circuit designs with some rather astounding effects: Comparator + negative feedback -----------> controllable-gain amplifierComparator + positive feedback -----------> comparator with hysteresisCombinational logic + positive feedback --> multivibrator In the field of process instrumentation, feedback is used to transform a simple measurement system into something capable of control: Measurement system + negative feedback ---> closed-loop control system Feedback, both positive and negative, has the tendency to add whole new dynamics to the operation of a device or system. Sometimes...
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| Look-up tables |
| 2008-01-10 01:28:30 |
Having learned about digital memory devices in the last chapter, we know that it is possible to store binary data within solid-state devices. Those storage "cells" within solid-state memory devices are easily addressed by driving the "address" lines of the device with the proper binary value(s). Suppose we had a ROM memory circuit written, or programmed, with certain data, such that the address lines of the ROM served as inputs and the data lines of the ROM served as outputs, generating the characteristic response of a particular logic function. Theoretically, we could program this ROM chip to emulate whatever logic function we wanted without having to alter any wire connections or gates. Consider the following example of a 4 x 2 bit ROM memory (a very small memory!) programmed with the...
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| A binary adder |
| 2008-01-10 01:27:40 |
Suppose we wanted to build a device that could add two binary bits together. Such a device is known as a half-adder, and its gate circuit looks like this: The Σ symbol represents the "sum" output of the half-adder, the sum's least significant bit (LSB). Cout represents the "carry" output of the half-adder, the sum's most significant bit (MSB). If we were to implement this same function in ladder (relay) logic, it would look like this: Either circuit is capable of adding two binary digits together. The mathematical "rules" of how to add bits together are intrinsic to the hard-wired logic of the circuits. If we wanted to perform a different arithmetic operation with binary bits, such as multiplication, we would have to construct another circuit. The above circuit designs...
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| Practical considerations of ADC circuits |
| 2008-01-10 01:19:18 |
Perhaps the most important consideration of an ADC is its resolution. Resolution is the number of binary bits output by the converter. Because ADC circuits take in an analog signal, which is continuously variable, and resolve it into one of many discrete steps, it is important to know how many of these steps there are in total. For example, an ADC with a 10-bit output can represent up to 1024 (210) unique conditions of signal measurement. Over the range of measurement from 0% to 100%, there will be exactly 1024 unique binary numbers output by the converter (from 0000000000 to 1111111111, inclusive). An 11-bit ADC will have twice as many states to its output (2048, or 211), representing twice as many unique conditions of signal measurement between 0% and 100%. Resolution is very impo...
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| Delta-Sigma () ADC |
| 2008-01-10 01:18:14 |
One of the more advanced ADC technologies is the so-called delta-sigma, or ΔΣ (using the proper Greek letter notation). In mathematics and physics, the capital Greek letter delta (Δ) represents difference or change, while the capital letter sigma (Σ) represents summation: the adding of multiple terms together. Sometimes this converter is referred to by the same Greek letters in reverse order: sigma-delta, or ΣΔ. In a ΔΣ converter, the analog input voltage signal is connected to the input of an integrator, producing a voltage rate-of-change, or slope, at the output corresponding to input magnitude. This ramping voltage is then compared against ground potential (0 volts) by a comparator. The comparator acts as a sort of 1-bit ADC, producing 1 bit of output ("high" or "low") depen...
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| Slope (integrating) ADC |
| 2008-01-10 01:17:40 |
So far, we've only been able to escape the sheer volume of components in the flash converter by using a DAC as part of our ADC circuitry. However, this is not our only option. It is possible to avoid using a DAC if we substitute an analog ramping circuit and a digital counter with precise timing. The is the basic idea behind the so-called single-slope, or integrating ADC. Instead of using a DAC with a ramped output, we use an op-amp circuit called an integrator to generate a sawtooth waveform which is then compared against the analog input by a comparator. The time it takes for the sawtooth waveform to exceed the input signal voltage level is measured by means of a digital counter clocked with a precise-frequency square wave (usually from a crystal oscillator). The basic schematic dia...
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| Tracking ADC |
| 2008-01-10 01:17:07 |
A third variation on the counter-DAC-based converter theme is, in my estimation, the most elegant. Instead of a regular "up" counter driving the DAC, this circuit uses an up/down counter. The counter is continuously clocked, and the up/down control line is driven by the output of the comparator. So, when the analog input signal exceeds the DAC output, the counter goes into the "count up" mode. When the DAC output exceeds the analog input, the counter switches into the "count down" mode. Either way, the DAC output always counts in the proper direction to track the input signal. Notice how no shift register is needed to buffer the binary count at the end of a cycle. Since the counter's output continuously tracks the input (rather than counting to meet the input and then resetting ba...
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| Successive approximation ADC |
| 2008-01-10 01:16:17 |
One method of addressing the digital ramp ADC's shortcomings is the so-called successive-approximation ADC. The only change in this design is a very special counter circuit known as a successive-approximation register. Instead of counting up in binary sequence, this register counts by trying all values of bits starting with the most-significant bit and finishing at the least-significant bit. Throughout the count process, the register monitors the comparator's output to see if the binary count is less than or greater than the analog signal input, adjusting the bit values accordingly. The way the register counts is identical to the "trial-and-fit" method of decimal-to-binary conversion, whereby different values of bits are tried from MSB to LSB to get a binary number that equals the origin...
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| Digital ramp ADC |
| 2008-01-10 01:15:47 |
Also known as the stairstep-ramp, or simply counter A/D converter, this is also fairly easy to understand but unfortunately suffers from several limitations. The basic idea is to connect the output of a free-running binary counter to the input of a DAC, then compare the analog output of the DAC with the analog input signal to be digitized and use the comparator's output to tell the counter when to stop counting and reset. The following schematic shows the basic idea: As the counter counts up with each clock pulse, the DAC outputs a slightly higher (more positive) voltage. This voltage is compared against the input voltage by the comparator. If the input voltage is greater than the DAC output, the comparator's output will be high and the counter will continue counting normally. E...
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| Flash ADC |
| 2008-01-10 01:15:19 |
Also called the parallel A/D converter, this circuit is the simplest to understand. It is formed of a series of comparators, each one comparing the input signal to a unique reference voltage. The comparator outputs connect to the inputs of a priority encoder circuit, which then produces a binary output. The following illustration shows a 3-bit flash ADC circuit: Vref is a stable reference voltage provided by a precision voltage regulator as part of the converter circuit, not shown in the schematic. As the analog input voltage exceeds the reference voltage at each comparator, the comparator outputs will sequentially saturate to a high state. The priority encoder generates a binary number based on the highest-order active input, ignoring all other ac...
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| The R/2R DAC |
| 2008-01-10 01:14:46 |
An alternative to the binary-weighted-input DAC is the so-called R/2R DAC, which uses fewer unique resistor values. A disadvantage of the former DAC design was its requirement of several different precise input resistor values: one unique value per binary input bit. Manufacture may be simplified if there are fewer different resistor values to purchase, stock, and sort prior to assembly. Of course, we could take our last DAC circuit and modify it to use a single input resistance value, by connecting multiple resistors together in series: Unfortunately, this approach merely substitutes one type of complexity for another: volume of components over diversity of component values. There is, however, a more efficient design methodology. By constructing a different kind of resistor net...
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| The R/2nR DAC |
| 2008-01-10 01:14:16 |
This DAC circuit, otherwise known as the binary-weighted-input DAC, is a variation on the inverting summer op-amp circuit. If you recall, the classic inverting summer circuit is an operational amplifier using negative feedback for controlled gain, with several voltage inputs and one voltage output. The output voltage is the inverted (opposite polarity) sum of all input voltages: For a simple inverting summer circuit, all resistors must be of equal value. If any of the input resistors were different, the input voltages would have different degrees of effect on the output, and the output voltage would not be a true sum. Let's consider, however, intentionally setting the input resistors at different values. Suppose we were to set the input resistor values at multiple powers of two: R,...
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| Introduction to DIGITAL-ANALOG CONVERSION |
| 2008-01-10 01:13:37 |
Connecting digital circuitry to sensor devices is simple if the sensor devices are inherently digital themselves. Switches, relays, and encoders are easily interfaced with gate circuits due to the on/off nature of their signals. However, when analog devices are involved, interfacing becomes much more complex. What is needed is a way to electronically translate analog signals into digital (binary) quantities, and vice versa. An analog-to-digital converter, or ADC, performs the former task while a digital-to-analog converter, or DAC, performs the latter. An ADC inputs an analog electrical signal such as voltage or current and outputs a binary number. In block diagram form, it can be represented as such: A DAC, on the other hand, inputs a binary n...
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| references |
| 2008-01-10 01:12:30 |
DataSheetCatalog.com http://www.datasheetcatalog.com/ http://www.st.com/stonline/psearch/index.htm select standard logics http://www.st.com/stonline/books/pdf/docs/2069.pdf http://www.ti.com/ (Products, Logic, Product Tree) ...
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| Ring counters |
| 2008-01-10 01:12:00 |
If the output of a shift register is fed back to the input. a ring counter results. The data pattern contained within the shift register will recirculate as long as clock pulses are applied. For example, the data pattern will repeat every four clock pulses in the figure below. However, we must load a data pattern. All 0's or all 1's doesn't count. Is a continuous logic level from such a condition useful? We make provisions for loading data into the parallel-in/ serial-out shift register configured as a ring counter below. Any random pattern may be loaded. The most generally useful pattern is a single 1. Loading binary 1000 into the ring counter, above, prior to shifting yields a viewable pattern. The data pattern for a single stage rep...
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